Progressive Engineering are currently seeking an experienced DFT Engineer for a 12 month contract role.
Initially, as a hands-on technical contributor, the successful candidate will work very closely with project leaders to develop DFT features to support post-silicon manufacturing test, debug, and characterisation for leading edge microprocessor designs.
- Typically, 5+ years' experience of Design for Testability in a complex Chip environment
- Possess ATPG/DFT expertise on recent designs at 16 or 14nm
- Knowledge of DFT design flow/tools and methodologies, VLSI design flow and familiarity with both front end and back end EDA tools
- Support of failure analysis and fault isolation of pattern failures
- Experience of Scan Insertion, BIST integration, Test-mode STA, architecture/planning, Test specification generation, Test-house management and Test bring-up beneficial
- Experienced with modern knowledge of JTAG , IOBIST, BIST , PBIST , MBIST , LBIST, Tessent (Fastscan), Tetramax, TAP controllers. Post silicon validation beneficial.
- Programming skills in Perl, tcl and c++
- Work with digital design and backend teams on DFT architecture/partitioning, run RTL, gate, and gate with SDF simulations to confirm correct functionality of DFT logic.
- Generate ATPG vectors, bring-up and debug patterns, resolve test pattern and coverage issues, support test engineering and operations through qualification, burn-in & production.
- Experience with logic design, especially involving multiple clock domains; Perl or other similar scripting languages; silicon lab bring-up; operating a tester to debug patterns (beneficial) and experience with physical design tools (such as PrimeTime).
To find out more about Progressive Recruitment please visit www.progressiverecruitment.com
Progressive Recruitment, a trading division of SThree Partnership LLP | Registered office | 1st Floor, 75 King William Street, London, EC4N 7BE, United Kingdom | Partnership Number | OC387148 England and Wales