Physical Design

Location: England, England Salary:
Sector: Engineering, Procurement, Construction & Manufacturing (EPCM) Type: contract

The Supplier will be expected to provide experienced resources with the appropriate skills and experience in the area of SoC physical design. The services required are Physical design engineers who are experts in the full digital IC design flow and specifically in floorplanning, the complete Place and Route flow, Signoff Static Timing Analysis, Timing closure activities and physical verification. The scope of work includes the physical implementation of blocks in TSMC 7nm process, specifically, the following aspects of the physical flow: 1. Create clock constraints & perform block level clock tree synthesis 2. Ownership of block level timing closure activities 3. Floorplanning of the blocks 4. Complete place & route of the blocks 5. Physical verification of the blocks 6. Signoff STA of the blocks 7. Creation of all necessary design views for integration into toplevel 8. Implementation of top-level signoff driven ECOs 9. Contribute to top-level design closure and signoff 10. Perform and ensure clean signoff checks for timing, physical verification, multi-voltage, formal & IRDROP for all agreed blocks 11. Organize regular review of the tasks in progress or completed 12. Complete all documentation associated with the above tasks 13. Responsible for identifying any RTL/documentation/flow bugs and logging bug reports for tracking purposes 14. Responsible for closing bug reports in a timely manner 15. Responsible for ensuring that there are no bugs found that would necessitate a stepping in the project. 16. Responsible for identifying design bugs and closing them off comprehensively or by clearly handing over to an acceptable owner 17. Work closely with & support RTL, DFX and physical teams 18. PT & ICC2 environment maintenance and updates as necessary Requirements: 1. Experience of advanced process nodes (16nm and lower) is highly desired. 2. Experience of Cadence Innovus or IC Compiler II is highly desired Start date: ASAP I apologise if this doesn't perfectly fit your skillset, but I do cover off multiple areas of the ASIC Design and Verification market, so if you are looking for contract work please reach out and we can have a chat to discuss what I can do for you. Unfortunately we do not offer sponsorship so you must have a valid UK Work permit for me to place you in any roles. Please get in contact in any of the above is of interest.

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Progressive Recruitment, a trading division of SThree Partnership LLP is acting as an Employment Business in relation to this vacancy | Registered office | 1st Floor, 75 King William Street, London, EC4N 7BE, United Kingdom | Partnership Number | OC387148 England and Wales