I currently have a role that I believe might suit you based in Wiltshire on a 6 month Contract basis.
- Experienced top-level designer Physical back end Design Engineer.
- The role of the Digital Physical Design Engineer will be to focus on the full RTL to GDSII flow of large complex designs.
- Need to be experienced either in creating hard macros & or taking SoC design from RTL synthesis through to foundry ready tapeout (GDSII).
- It's a 28nm project and need experience of full chip integration and signoff.
- Someone to handle complex hierarchical chip integration in ICC2.
- Take responsibility for driving timing closure through physical synthesis and Place & Route tools, and working closely with ASIC vendors.
- Drive best-practice physical design and sub-micron methodologies to streamline physical design work. You must be well versed in: · Block level implementation including physical synthesis, P&R, CTS and optimization · Timing constraints, STA and timing closure · Physical Design Verification Flows · Floor planning, P&R and synthesis tools (Synopsys or Cadence considered)"
I apologise if this doesn't perfectly fit your skillset, but I do cover off multiple areas of the ASIC Design and Verification market, so if you are looking for contract work please reach out and we can have a chat to discuss what I can do for you. Unfortunately we do not offer sponsorship so you must have a valid UK Work permit for me to place you in any roles.
Please get in contact in any of the above is of interest.
To find out more about Progressive Recruitment please visit www.progressiverecruitment.com
Progressive Recruitment, a trading division of SThree Partnership LLP is acting as an Employment Business in relation to this vacancy | Registered office | 1st Floor, 75 King William Street, London, EC4N 7BE, United Kingdom | Partnership Number | OC387148 England and Wales