- Systemization of a digital ASIC (FPGA, ARM, SoC).
- 5+ years hands-on Verliog and/or SystemVerilog experience.
- Knowledge of FPGA/ARM and IP Cores systemization.
- Knowledge of multi-gigabit interface protocols (Ethernet, SGMII, RGMII), memory technologies (DDR3, DDR4), interconnect protocols (PCIe), digital logics and common communication interfaces (UART, USB, SPI, I2C) is highly desired.
- Experience in digital frontend design (DSP, CFR, DPD, Up and Down Converters, Digital Filters).
- Experience in SoC performance and power estimation and optimization, clock and reset distribution optimization.
- Experience working with Xilinx Zynq-7000 and/or Intel Arria-V SoC is a plus.
- Experience with scripting languages such as Tcl or Python
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Progressive Recruitment, a trading division of SThree Partnership LLP is acting as an Employment Business in relation to this vacancy | Registered office | 1st Floor, 75 King William Street, London, EC4N 7BE, United Kingdom | Partnership Number | OC387148 England and Wales