DFT Engineer

Location: Reading, England, United Kingdom
Salary: £70 - £71 per annum +
Sectors: Engineering
Job Type: Contract
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ASIC Design for Test(DFT) lead engineer with 9+ years of experience including:

Excellent knowledge of the latest state-of-the-art elements in DFT and Test.

Hands-on design experience in DFT insertion and verification of Scan/ATPG, MemoryBist and Jtag protocols using commercial test generation tools for large complex designs.

Tool set includes : VCS, Design Compiler, Spyglass, TetraMax, SMS, BSD Compiler. Cross-Clock Domain Crossing, Primetime.

Previous experience leading a team and driving technical execution results.

Experience with DFT silicon sign-off for tape out.

Verification skills include Verilog, UVM, Logic Equivalency checking and validating the test-timing of the design.

Experience working with Gate level simulation and debug with VCS and other simulators.

Post-silicon validation and debug experience including feature validation, characterization and yield analysis.

Strong verbal communication skills and ability to thrive in a dynamic environment.

Please click here to find out more about our Key Information Documents. Please note that the documents provided contain generic information. If we are successful in finding you an assignment, you will receive a Key Information Document which will be specific to the vendor set-up you have chosen and your placement.

To find out more about Progressive Recruitment please visit www.progressiverecruitment.com

Progressive Recruitment, a trading division of SThree Partnership LLP is acting as an Employment Business in relation to this vacancy | Registered office | 1st Floor, 75 King William Street, London, EC4N 7BE, United Kingdom | Partnership Number | OC387148 England and Wales

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